The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2024
Filed:
Nov. 10, 2022
Parker-hannifin Corporation, Cleveland, OH (US);
Erick W. Rudaitis, Sterling Hts., MI (US);
Timothy Faillo, Kalamazoo, MI (US);
Serge Rondreux, Evreux, FR;
Patrick Berdal, Fontaine la Guyon, FR;
Parker-Hannifin Corporation, Cleveland, OH (US);
Abstract
A valve driver system for driving a plurality of valves of a valve manifold. The system includes a plurality of valve drivers, wherein each valve driver is configured to drive a zone of one or more valves of the manifold; and, a power board that separately powers the respective valve drivers such that the valve drivers are powered separately with a separate power source that can individually power the valve driver. A multiple safety zone valve driver system for driving a plurality of valves of a valve manifold. The system includes a plurality of valve drivers; a first safe PM output; and a second safe PM output. The first and second safe PM outputs are configured such that in response to a first type of safety event the first PM output shuts off power to the first one or more valve drivers and the second PM output maintains power to the second one or more valve drivers. A zoning adapter for adapting logical addresses of valve drivers to physical addresses of valves of a valve manifold A conversion portion converts logical addresses to physical addresses of the valves in the different zones of the valve manifold with a spacing in one or more portions of the logical addresses.