The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Feb. 21, 2022
Applicant:

Richtek Technology Corporation, Zhubei, TW;

Inventor:

Yi-Kuang Chen, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H03F 3/217 (2006.01); H03F 1/02 (2006.01);
U.S. Cl.
CPC ...
H03F 1/26 (2013.01); H03F 1/0216 (2013.01); H03F 3/217 (2013.01); H03F 2200/372 (2013.01);
Abstract

A class-D amplifying system includes: a first digital-to-analog converter (DAC), a class-D amplifier circuit and a second DAC. The first DAC generates an analog input signal according to a digital input signal. The class-D amplifier circuit generates an output signal according to the analog input signal in a pulse width modulation (PWM) manner. The second DAC generates a common mode (CM) adjustment current for adjusting a CM voltage of the analog input signal according to one or more of the following parameters: (1) the CM voltage of the analog input signal; and/or (2) a driving power. A power stage circuit of the class-D amplifier circuit is powered by the driving power. The second DAC determines which parameter the CM adjustment current is correlated to according to: (A) A level state of the output signal; and/or (B) A level state of a PWM signal of the class-D amplifier circuit.


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