The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

May. 24, 2022
Applicant:

Seiko Epson Corporation, Tokyo, JP;

Inventor:

Masuhide Ikeda, Matsumoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H02H 9/04 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H02H 9/046 (2013.01);
Abstract

An ESD protection circuit includes a power MOS transistor disposed between a first line and a second line, a clamp circuit disposed between the first line and a first node to which a gate of the power MOS transistor is coupled, a first resistor disposed between the first node and the second line, a MOS transistor disposed between the first node and the second line, a third line supplied with a third potential generated by a constant-voltage circuit of the protection target circuit, and a second resistor and a first capacitor coupled in series between a second node coupled to the third line and the second line, wherein when defining a junction between the second resistor and the first capacitor as a third node, a gate of the MOS transistor is coupled to the third node.


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