The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Dec. 22, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jong-Kyu Ryu, Seoul, KR;

Min-Su Kim, Hwaseong-si, KR;

Yong-Geol Kim, Hwaseong-si, KR;

Dae-Seong Lee, Busan, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01L 27/02 (2006.01); H01L 23/552 (2006.01); G03F 1/36 (2012.01); H01L 27/118 (2006.01); G06F 30/398 (2020.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); G03F 1/36 (2013.01); G06F 30/398 (2020.01); H01L 23/552 (2013.01); H01L 27/11807 (2013.01); H01L 2027/11874 (2013.01); H01L 2027/11881 (2013.01); H01L 2027/11892 (2013.01);
Abstract

A semiconductor device is provided. The semiconductor device includes a first hard macro; a second hard macro spaced apart from the first hard macro in a first direction by a first distance; a head cell disposed in a standard cell area between the first hard macro and the second hard macro, the head cell being configured to perform power gating of a power supply voltage provided to one from among the first hard macro and the second hard macro; a plurality of first ending cells disposed in the standard cell area adjacent to the first hard macro; and a plurality of second ending cells disposed in the standard cell area adjacent to the second hard macro, the head cell not overlapping the plurality of first ending cells and the plurality of second ending cells.


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