The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Mar. 02, 2023
Applicant:

Rolls-royce Deutschland Ltd & CO KG, Blankenfelde-Mahlow, DE;

Inventors:

Uwe Waltrich, Forchheim, DE;

Stanley Buchert, Herzogenaurach, DE;

Assignee:

Rolls-Royce Deutschland Ltd & Co KG, Blankenfelde-Mahlow, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H02M 7/217 (2006.01); H01L 23/538 (2006.01); B64D 35/04 (2006.01); B64D 27/24 (2006.01); B60L 58/00 (2019.01); H01L 23/31 (2006.01); B64C 29/00 (2006.01); B64D 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); B60L 58/00 (2019.02); B64C 29/0008 (2013.01); B64D 27/24 (2013.01); B64D 35/04 (2013.01); H01L 23/3121 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H02M 7/217 (2013.01); B60L 2200/10 (2013.01); B60L 2210/30 (2013.01); B64D 2027/026 (2013.01);
Abstract

A power electronics converter includes a multi-layer planar carrier substrate having a plurality of electrically conductive layers, at least one electrical connection, and a converter commutation cell comprising a power circuit and a gate driver circuit. The power circuit includes at least one power semiconductor switching element and at least one capacitor. Each power semiconductor switching element is included in a power semiconductor prepackage having one or more power semiconductor switching elements embedded in a solid insulating material. The power electronics converter includes a heat sink configured to remove heat from the power semiconductor prepackage. A converter parameter η is greater than or 20 equal to 100 kW/m3K, η being defined as a heat transfer coefficient between the heat removal side of the power semiconductor prepackage and a cooling medium of the heat sink divided by the size of a gap between the power semiconductor prepackage and the heat sink.


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