The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2024
Filed:
Sep. 22, 2021
International Business Machines Corporation, Armonk, NY (US);
Lawrence A. Clevenger, Saratoga Springs, NY (US);
Brent Anderson, Jericho, VT (US);
Nicholas Anthony Lanzillo, Wynantskill, NY (US);
Christopher J. Penny, Saratoga Springs, NY (US);
Kisik Choi, Watervliet, NY (US);
Robert Robison, Rexford, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An approach providing a semiconductor wiring structure with a self-aligned top via on a first metal line and under a second metal line. The semiconductor wiring structure includes a plurality of first metal lines in a bottom portion of a first dielectric material. The semiconductor wiring structure includes a top via in a top portion of the first dielectric material, where the top via is over a first metal line of the plurality of first metal lines. The semiconductor wiring structure includes a second dielectric material above each of the plurality of first metal lines except the first metal line of the plurality of first metal lines. Furthermore, the semiconductor wiring structure includes a second metal line above the top via, wherein the second metal line is in a third dielectric material and a hardmask layer that is under the third dielectric material.