The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Sep. 09, 2020
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Hsiao-Tsung Yen, Hsinchu, TW;

Jian-You Chen, Hsinchu, TW;

Ka-Un Chan, Hsinchu, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01F 27/28 (2006.01); H01F 27/40 (2006.01); H01F 27/29 (2006.01);
U.S. Cl.
CPC ...
H01F 27/2804 (2013.01); H01F 27/29 (2013.01); H01F 27/40 (2013.01); H01F 2027/2809 (2013.01);
Abstract

An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between first node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.


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