The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Feb. 14, 2019
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Nikhil Devanur Rangarajan, Seattle, WA (US);

Jorgen Thelin, Redmond, WA (US);

Amar Phanishayee, Redmond, WA (US);

Guanhua Wang, Redmond, WA (US);

Shivaram Venkataraman, Redmond, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/08 (2023.01); G06F 13/42 (2006.01); G06N 3/02 (2006.01); G06F 15/163 (2006.01);
U.S. Cl.
CPC ...
G06N 3/08 (2013.01); G06F 13/4221 (2013.01); G06F 15/163 (2013.01); G06N 3/02 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/0062 (2013.01);
Abstract

An interconnect topology for communication between GPUs in a computing system is determined. A quantity of directed spanning trees are generated for transmitting data between the GPUs using the interconnect topology and packed. The directed spanning trees define the connections between GPUs that are to be utilized for the transmission and the amount of data to be transmitted on each connection. Program code is generated for implementing the data transfer defined by the directed spanning trees. When the program code is executed, the directed spanning trees are used to pipeline the transmission of chunks of data, such as model parameters used during data-parallel DNN training, between the GPUs. The program code can also determine an optimal chunk size for data to be transferred between the GPUs.


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