The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2024
Filed:
Oct. 20, 2020
Nvidia Corporation, Santa Clara, CA (US);
Animesh Khare, Bangladore, IN;
Ashish Kumar, Patna, IN;
Shantanu Sarangi, Saratoga, CA (US);
Rahul Garg, Jind, IN;
Sailendra Chadalavada, Saratoga, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
Techniques for isolating interfaces while testing a semiconductor device include a semiconductor device having a link interface that couples the semiconductor device to a high-speed data transfer link, a clock control unit that transmits one or more clock signals to the link interface; and a protection module. The protection module asserts a clock stop request to the clock control unit and, in response to receiving a clock stop acknowledgement from the clock control unit, asserts a clamp enable to cause the link interface to be isolated from portions of the semiconductor device. After waiting for a first predetermined period of time to expire, the protection module de-asserts the clock stop request.