The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Sep. 03, 2021
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Robert Michael Johnson, Austin, TX (US);

Nafea Bshara, San Jose, CA (US);

Matthew Shawn Wilson, Bainbridge Island, WA (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/24 (2006.01); G06F 9/50 (2006.01); G06F 15/78 (2006.01); H04L 41/5054 (2022.01); H04L 41/50 (2022.01);
U.S. Cl.
CPC ...
H04L 41/5054 (2013.01); G06F 9/50 (2013.01); G06F 15/7871 (2013.01); H04L 41/5096 (2013.01);
Abstract

Methods and apparatus are disclosed for programming reconfigurable logic devices such as FPGAs in a networked server environment. In one example, a system hosting a network service providing field programmable gate array (FPGA) services includes a network service provider configured to receive a request to implement application logic in a plurality of FPGAs, allocate a computing instance comprising the FPGAs in responses to receiving the request, produce configuration information for programming the FPGAs, and send the configuration information to an allocated computing instance. The system further includes a computing host that is allocated by the network service provider as a computing instance which includes memory, processors configured to execute computer-executable instructions stored in the memory, and the programmed FPGAs.


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