The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Nov. 17, 2021
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Romesh Kumar Nandwana, Breinigsville, PA (US);

Abhishek Bhat, Allentown, PA (US);

Kadaba Lakshmikumar, Basking Ridge, NJ (US);

Pavan Kumar Hanumolu, Champaign, IL (US);

Assignee:

CISCO TECHNOLOGY, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/16 (2006.01); H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
H04B 1/16 (2013.01); H03M 1/66 (2013.01);
Abstract

A receiver is provided that includes a plurality of sub-rate receiver lanes each of which is configured to receive an analog receive signal from an analog front-end and produce digital sub-rate receiver data. The receiver includes one or more first digital-to-analog converters (DACs) (also referred to herein as 'average' DACs) shared across the plurality of sub-rate receiver lanes, and one or more second DACs (also referred to herein as “mismatch cancellation” DACs) for each sub-rate receiver lane of the plurality of sub-rate receiver lanes. The one or more second DACs of a respective sub-rate receiver lane provide output to be combined with an output of a corresponding one of the one or more first DACs during processing of the analog receive signal in the respective sub-rate receiver lane to account for a sub-rate receiver lane specific offset with respect to a corresponding one of the one or more first DACs.


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