The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Oct. 07, 2022
Applicant:

Silanna Asia Pte Ltd, Singapore, SG;

Inventors:

Joseph H. Colles, Bonsall, CA (US);

Steven E. Rosenbaum, San Diego, CA (US);

Assignee:

Silanna Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 4/50 (2006.01); H03K 7/08 (2006.01);
U.S. Cl.
CPC ...
H03K 4/50 (2013.01); H03K 7/08 (2013.01);
Abstract

An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.


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Quick Actions:

Colles, Joseph. (2024). Combining voltage ramps to create linear voltage ramp (U.S. Patent No. 11863191). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11863191

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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