The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2024
Filed:
May. 24, 2021
Applicant:
Murata Manufacturing Co., Ltd., Kyoto, JP;
Inventor:
Hideyo Yamashiro, Kyoto, JP;
Assignee:
MURATA MANUFACTURING CO., LTD., Kyoto, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/30 (2006.01); H03F 3/21 (2006.01);
U.S. Cl.
CPC ...
H03F 1/30 (2013.01); H03F 3/21 (2013.01); H03F 2200/447 (2013.01);
Abstract
A bias circuit includes first to sixth transistors and first to fifth resistors. The collector of the fifth transistor is coupled to a node in a path connecting the collector of the fourth transistor and one end of the third resistor. The collector of the sixth transistor Tris coupled to one end of the fifth resistor.
Yamashiro, Hideyo. (2024). Bias circuit (U.S. Patent No. 11863129). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11863129
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile