The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2024
Filed:
Oct. 06, 2021
Applicant:
Rohm Co., Ltd., Kyoto, JP;
Inventor:
Katsuhiko Yoshihara, Kyoto, JP;
Assignee:
ROHM CO., LTD., Kyoto, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 23/49811 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 25/072 (2013.01); H01L 2224/29019 (2013.01); H01L 2224/2957 (2013.01); H01L 2224/29123 (2013.01); H01L 2224/29124 (2013.01); H01L 2224/29639 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8383 (2013.01); H01L 2224/83192 (2013.01);
Abstract
There is provided a semiconductor device including: a semiconductor element; a support substrate configured to support the semiconductor element; an intermediate metal layer interposed between the semiconductor element and the support substrate in a thickness direction of the support substrate, wherein the semiconductor element and the intermediate metal layer are bonded by solid phase diffusion bonding; and a first positioning portion including a portion of the semiconductor element and a first portion of the intermediate metal layer and configured to suppress relative movement between the semiconductor element and the intermediate metal layer.