The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Jun. 29, 2020
Applicant:

Analog Devices International Unlimited Company, Limerick, IE;

Inventors:

Jan Kubik, Limerick, IE;

Bernard P. Stenson, Limerick, IE;

Michael Noel Morrissey, Limerick, IE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 21/288 (2006.01); H01L 21/033 (2006.01); C23C 18/16 (2006.01); H01L 23/532 (2006.01); C25D 5/02 (2006.01); C25D 7/12 (2006.01); C25D 5/10 (2006.01); H05K 3/24 (2006.01); H05K 3/18 (2006.01); H05K 3/42 (2006.01); H01L 49/02 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01); C23C 18/1605 (2013.01); C23C 18/1651 (2013.01); C25D 5/022 (2013.01); C25D 5/10 (2013.01); C25D 7/123 (2013.01); H01L 21/0331 (2013.01); H01L 21/2885 (2013.01); H01L 21/76846 (2013.01); H01L 21/76852 (2013.01); H01L 21/76873 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 28/10 (2013.01); H05K 3/184 (2013.01); H05K 3/244 (2013.01); H05K 3/422 (2013.01); H05K 1/0265 (2013.01); H05K 3/188 (2013.01); H05K 3/424 (2013.01); H05K 2201/0367 (2013.01); H05K 2201/0391 (2013.01); H05K 2201/096 (2013.01); H05K 2201/09563 (2013.01); H05K 2201/09845 (2013.01); H05K 2203/0716 (2013.01); H05K 2203/1407 (2013.01); H05K 2203/1423 (2013.01); H05K 2203/1476 (2013.01);
Abstract

The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.


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