The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Apr. 24, 2020
Applicant:

D-wave Systems Inc., Burnaby, CA;

Inventors:

Sheir Yarkoni, Vancouver, CA;

Trevor Michael Lanting, Vancouver, CA;

Kelly T. R. Boothby, Vancouver, CA;

Andrew Douglas King, Vancouver, CA;

Evgeny A. Andriyash, Vancouver, CA;

Mohammad H. Amin, Coquitlam, CA;

Assignee:

D-WAVE SYSTEMS INC., Burnaby, CA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06N 10/00 (2022.01); G06N 7/08 (2006.01); G06N 3/044 (2023.01); G06N 3/047 (2023.01); B82Y 10/00 (2011.01);
U.S. Cl.
CPC ...
G06N 10/00 (2019.01); B82Y 10/00 (2013.01); G06N 3/044 (2023.01); G06N 3/047 (2023.01); G06N 7/08 (2013.01);
Abstract

A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.


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