System which provides plural processes in a host with asynchronous access to plural portions of the memory of another host

Abstract

API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process Pperformed by the first host with access, typically via the bridge chip, to at least local memory buffer Mresiding in the second memory, typically after the access control functionality first validates that process Phas a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M, e.g., via the bridge chip.