The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Feb. 14, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Sonal Santan, San Jose, CA (US);

Yu Liu, Newark, CA (US);

Yenpang Lin, Campbell, CA (US);

Lizhi Hou, Santa Clara, CA (US);

Cheng Zhen, San Jose, CA (US);

Yidong Zhang, Fremont, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/64 (2013.01); G06F 21/71 (2013.01); G06F 21/57 (2013.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 21/572 (2013.01); G06F 13/1642 (2013.01); G06F 13/1663 (2013.01); G06F 21/64 (2013.01); G06F 21/71 (2013.01);
Abstract

An integrated circuit can include a communication endpoint configured to maintain a communication link with a host computer, a queue configured to receive a plurality of host commands from the host computer via the communication link, and a processor configured to execute a device runtime. The processor, responsive to executing the device runtime, is configured to perform validation of the host commands read from the queue and selectively execute the host commands based on a result of the validation on a per host command basis. The host commands are executable by the processor to manage functions of the integrated circuit. The queue is implemented in a region of memory that is shared by the integrated circuit and the host computer.


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