The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Jan. 15, 2021
Applicant:

Seiko Epson Corporation, Toyko, JP;

Inventors:

Hideyuki Yamada, Minowa, JP;

Atsushi Tanaka, Minowa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); G01C 19/5776 (2012.01); H03M 1/06 (2006.01); G01C 19/5614 (2012.01); G01C 19/5607 (2012.01); G01P 15/14 (2013.01); H03M 1/46 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); G01C 19/5607 (2013.01); G01C 19/5614 (2013.01); G01C 19/5776 (2013.01); G01P 15/14 (2013.01); H03M 1/0626 (2013.01); H03M 1/468 (2013.01);
Abstract

A physical quantity detection circuit includes an analog/digital conversion circuit having an input capacitance and sampling an analog signal in the input capacitance to convert the analog signal into a digital signal, a precharge circuit for precharging the input capacitance before the analog/digital conversion circuit sample the analog signal in the input capacitance, a digital arithmetic circuit for performing arithmetic processing to the digital signal, and a reference voltage circuit for supplying a power supply voltage to the precharge circuit and the digital arithmetic circuit, wherein the arithmetic processing start timing and the arithmetic processing end timing of the digital arithmetic circuit are set to the timings avoiding the precharge period in which the precharge circuit precharges the input capacitance.


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