The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Mar. 16, 2022
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo, JP;

Inventors:

Vesa Törnqvist, Helsinki, FI;

Teemu Salo, Riihimäki, FI;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 17/12 (2006.01); G11C 17/18 (2006.01); H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
G11C 16/102 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 17/12 (2013.01); G11C 17/18 (2013.01); H03M 13/1174 (2013.01);
Abstract

The present invention relates to the field of digital memory, and in particular to a multiple-time programmable (MTP) memory employing error correction codes (ECC), the MTP memory being made up of one-time programmable (OTP) memory modules. Pointers to the memory address of currently in-use OTP memory blocks in use for each virtual MTP memory block are stored in OTP memory with an error correcting code. The pointers encode the memory addresses according to a scheme that ensure that only bit changes in a single direction are required in both the pointer data and the error correction code when the memory address is incremented.


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