The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Aug. 02, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Levent Erdal Aygun, Cupertino, CA (US);

Chin-Wei Lin, San Jose, CA (US);

Yun Wang, Cupertino, CA (US);

Xin Lin, Princeton, NJ (US);

Aida R Colon-Berrios, Cupertino, CA (US);

Shih Chang Chang, Cupertino, CA (US);

Fan Gui, San Jose, CA (US);

Mohammad Reza Esmaeili Rad, San Jose, CA (US);

Ran Tu, San Jose, CA (US);

Warren S Rieutort-Louis, Cupertino, CA (US);

Abbas Jamshidi Roudbari, Saratoga, CA (US);

Bhadrinarayana Lalgudi Visweswaran, San Mateo, CA (US);

Cheng-Chih Hsieh, Santa Clara, CA (US);

Ricardo A Peterson, Fremont, CA (US);

Shyuan Yang, San Mateo, CA (US);

Ting-Kuo Chang, San Jose, CA (US);

Tsung-Ting Tsai, San Jose, CA (US);

Yuchi Che, Santa Clara, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/00 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/007 (2013.01); H01L 27/124 (2013.01); G09G 2300/0452 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0626 (2013.01); G09G 2330/021 (2013.01);
Abstract

To reduce the amount of space occupied in the inactive area of a display by gate driver circuitry, at least a portion of the gate driver circuitry may be positioned in the active area of the display. To accommodate the gate driver circuitry, emissive sub-pixels may be laterally shifted relative to corresponding thin-film transistor sub-pixels. This allows for the thin-film transistor sub-pixels to be grouped adjacent to the central area of the active area, leaving room along an edge of the active area to accommodate one or more additional display components such as gate driver circuitry or fanout portions of data lines.


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