The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
Feb. 21, 2022
Applicant:
Apple Inc., Cupertino, CA (US);
Inventors:
Doron Rajwan, Rishon LeZion, IL;
Karl Daniel Wulcan, San Francisco, CA (US);
Tal Kuzi, Tel Aviv, IL;
Inder M. Sodhi, Palo Alto, CA (US);
Achmed R. Zahir, Menlo Park, CA (US);
Assignee:
Apple Inc., Cupertino, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3206 (2019.01); G06F 1/324 (2019.01); G06F 1/3228 (2019.01); G06F 1/3293 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/324 (2013.01); G06F 1/3228 (2013.01); G06F 1/3293 (2013.01); G06F 1/3296 (2013.01);
Abstract
Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Specifically, a power manager circuit in an integrated circuit (e.g., a system on a chip) may modify power budgets for various components in the integrated circuit to reduce the amount of power control caused by external signaling that indicates a voltage regulator overload (e.g., a voltage droop).