The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Nov. 29, 2019
Applicants:

Hefei Boe Joint Technology Co., Ltd., Anhui, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhongyuan Wu, Beijing, CN;

Yongqian Li, Beijing, CN;

Can Yuan, Beijing, CN;

Zhidong Yuan, Beijing, CN;

Meng Li, Beijing, CN;

Dacheng Zhang, Beijing, CN;

Lang Liu, Beijing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
H10K 59/1315 (2023.02);
Abstract

Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.


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