The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Mar. 28, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Yang Wan Kim, Yongin-si, KR;

Byung Sun Kim, Yongin-si, KR;

Su Jin Lee, Yongin-si, KR;

Hyung Jun Park, Yongin-si, KR;

Jae Yong Lee, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H10K 59/131 (2023.01); H10K 59/88 (2023.01); H10K 59/121 (2023.01); H10K 102/00 (2023.01); G09G 3/3233 (2016.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/88 (2023.02); G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 2300/0413 (2013.01); G09G 2300/0426 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/02 (2013.01); G09G 2330/04 (2013.01); H10K 2102/341 (2023.02);
Abstract

A display device including a substrate including a first display region having a first width, a second display region having a second width smaller than the first width, a peripheral region at a periphery of the first and second display regions, and a dummy region in the peripheral region, a first pixel in the first display region, a second pixel in the second display region, a first control line connected to the first pixel and extending in the first display region, a second control line connected to the second pixel and extending in the second display region, and a dummy line connected to the second control line in the dummy region, wherein the second control line is at a first conductive layer on a first insulating layer, the dummy line is at a second conductive layer on a second insulating layer on the first conductive layer.


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