The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Feb. 02, 2022
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Kei Ochiai, Tokyo, JP;

Yoshiaki Takada, Kanagawa, JP;

Masaki Sato, Kanagawa, JP;

Masahiro Kobayashi, Tokyo, JP;

Daisuke Kobayashi, Saitama, JP;

Tetsuya Itano, Kanagawa, JP;

Nao Nakatsuji, Kanagawa, JP;

Yasuhiro Oguro, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 25/50 (2023.01); H04N 25/75 (2023.01); H04N 25/79 (2023.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 25/50 (2023.01); H04N 25/75 (2023.01); H04N 25/79 (2023.01); H01L 27/14634 (2013.01);
Abstract

A photoelectric conversion apparatus includes a first substrate including a pixel array including a plurality of pixels, a second substrate layered on the first substrate and including an AD conversion portion including a plurality of AD conversion circuits configured to convert a signal output from the first substrate into a digital signal, wherein the second substrate further includes a plurality of signal processing units including a first signal processing unit and a second signal processing unit both configured to perform machine learning processing, wherein each of a plurality of sets includes a plurality of AD conversion circuits that differ between the plurality of sets, wherein the first signal processing unit is arranged to correspond to one of the plurality of sets, and wherein the second signal processing unit is arranged to correspond to another one of the plurality of sets.


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