The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Aug. 10, 2022
Applicants:

Denso Corporation, Kariya, JP;

Toyota Jidosha Kabushiki Kaisha, Toyota, JP;

Mirise Technologies Corporation, Nisshin, JP;

Inventors:

Shotaro Wada, Nisshin, JP;

Tomohiro Nezuka, Nisshin, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 (2006.01); H03K 5/003 (2006.01); H03K 21/00 (2006.01); H03K 5/15 (2006.01);
U.S. Cl.
CPC ...
H03K 5/003 (2013.01); H03K 5/15013 (2013.01); H03K 5/15026 (2013.01); H03K 21/00 (2013.01); H03K 2005/00013 (2013.01);
Abstract

A clock signal generation circuit for a switched capacitor circuit with a chopping function unit includes: first and second synchronous clock circuits that generate first and second synchronous clock signals, respectively; an edge signal generation circuit that generates one or more rise and fall edge signals by delaying the first synchronous clock signal; a first clock generator that generate a first clock signal group for driving the switched capacitor circuit; and a second clock generator that generates a second clock signal group for driving the chopping function unit. Frequencies of the first and second clock signal groups are respectively defined by the first and second synchronous clock circuits. Rise and fall edges of the first and second clock signal groups are defined by the edge signal generation circuit.


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