The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Sep. 18, 2018
Applicant:

Zhuzhou Crrc Times Electric Co., Ltd, Hunan, CN;

Inventors:

Guoyou Liu, Hunan, CN;

Chunlin Zhu, Hunan, CN;

Liheng Zhu, Hunan, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 29/423 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7396 (2013.01); H01L 29/0696 (2013.01); H01L 29/4236 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/66348 (2013.01); H01L 29/7397 (2013.01); H01L 29/41766 (2013.01);
Abstract

An IGBT chip having a Γ-shape mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a gate region and two active regions located at two sides of the gate region. The gate region includes a trench gate and a planar gate that is located on a surface of the gate region, and the planar gate is connected with the trench gate and formed a Γ-shape mixed structure. In this way, the IGBT chip can have a significantly improved chip density, while retaining features of low power consumption and high current density of the trench gate and a feature of a wide safe operating area of the planar gate.


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