The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Mar. 18, 2021
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Haoliang Zheng, Beijing, CN;

Minghua Xuan, Beijing, CN;

Dongni Liu, Beijing, CN;

Zhenyu Zhang, Beijing, CN;

Li Xiao, Beijing, CN;

Liang Chen, Beijing, CN;

Hao Chen, Beijing, CN;

Jiao Zhao, Beijing, CN;

Lijun Yuan, Beijing, CN;

Yi Ouyang, Beijing, CN;

Qi Qi, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G11C 19/28 (2013.01); G09G 2300/043 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

A shift register (SR) includes a voltage control circuit () and a bias compensation circuit (). The voltage control circuit () is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit () is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL) to the first signal output terminal (EM) and the second signal output terminal (EM).


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