The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Nov. 25, 2022
Applicant:

Hkc Corporation Limited, Guangdong, CN;

Inventors:

Shishuai Huang, Shenzhen, CN;

Haoxuan Zheng, Shenzhen, CN;

Assignee:

HKC CORPORATION LIMITED, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/136222 (2021.01);
Abstract

The embodiments relate to array substrate technologies. Provided is an array substrate and a display panel, the array substrate includes a display region and a non-display region. A first bonding-lead part, a second bonding-lead part and a third bonding-lead part are arranged in sequence in a bonding area of the non-display region. A first side of the first bonding-lead part is used for connecting with a gate driver unit test wiring, and a second side of the first bonding-lead part is used for connecting with a gate driver signal wiring. A width of the first bonding-lead part is smaller than that of the second bonding-lead part, such that a wiring area is formed on the first side of the first bonding-lead part and/or the second side of the first bonding-lead part, thereby providing sufficient wiring space for the GOA unit test wiring and the GOA signal wiring.


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