The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Dec. 16, 2020
Applicant:

Itron, Inc., Liberty Lake, WA (US);

Inventors:

Kalvinder Pal Singh, Miami, AU;

Darin Byron Johnson, San Jose, CA (US);

Zoltan Peter Kiss, Los Altos, CA (US);

Assignee:

ITRON, INC., Liberty Lake, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 41/06 (2022.01); H04W 12/033 (2021.01); H04L 41/28 (2022.01); H04L 9/40 (2022.01); H04L 9/08 (2006.01); H04W 12/047 (2021.01); G06F 1/3287 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
H04W 12/033 (2021.01); G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); H04L 9/0819 (2013.01); H04L 9/0894 (2013.01); H04L 41/06 (2013.01); H04L 41/28 (2013.01); H04L 63/0428 (2013.01); H04L 63/062 (2013.01); H04L 63/123 (2013.01); H04W 12/047 (2021.01);
Abstract

Various embodiments disclose a computer-implemented method for sending a message associated with an outage event, comprising, at a first node in a network, receiving a key from a second node in the network, wherein the second node is adjacent to the first node; storing the key in a first memory, wherein the first memory is capable of operating in a low power mode; detecting an outage event; in response to detecting the outage event, operating a first processor in the low power mode; and via the first processor operating in the low power mode: generating a message, securing the message using the key, and sending the message to the second node.


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