The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Aug. 05, 2021
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Susan A. Thompson, Half Moon Bay, CA (US);

Anup K. Sharma, Sunnyvale, CA (US);

Christopher G Zeleznik, San Jose, CA (US);

Harish Venkataraman, Half Moon Bay, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/085 (2006.01); H03L 7/081 (2006.01); H05B 47/10 (2020.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01); H03L 7/081 (2013.01); H05B 47/10 (2020.01);
Abstract

An optoelectronic system includes a transmit side and a receive side. The transmit side and the receive side each include an oversampled phase locked loop configured to receive a decimated system clock signal. Each phase-locked loop is configured to output a high frequency sampling clock signal that, in the case of the transmit side, may be leveraged to generate an arbitrary current waveform that, in turn, can be delayed by a delay-locked loop before being applied to a current-controlled light emitting element. The receive side can generate a clock signal at the same high frequency as the transmit side and can be configured to trigger a reset of the transmit side so that the high frequency clock signals between the transmit and receive sides are synchronized.


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