The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2023
Filed:
Jun. 25, 2021
Applicant:
Hirose Electric Co., Ltd., Kanagawa, JP;
Inventors:
Ching-Chao Huang, San Jose, CA (US);
Jeremy Buan, San Jose, CA (US);
Jingqian Tian, San Jose, CA (US);
Tadashi Ohshida, Cupertino, CA (US);
Assignee:
Hirose Electric Co., Ltd., Kanagawa, JP;
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 (2006.01); H03K 5/1252 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1252 (2013.01); H03K 2005/00078 (2013.01);
Abstract
Example implementations described herein are directed to reducing far end cross talk (FEXT), including differential-to-differential far end crosstalk (DDFEXT) or single ended FEXT through generating and applying a delay shifter/inverter that is cascaded onto a target electrical system and shifts the even-mode and odd-mode propagation delay of a target electrical system to be substantially equal, which in turn reduces FEXT in the overall system.