The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

May. 12, 2021
Applicant:

Gowin Semiconductor Corporation, GuangZhou, CN;

Inventor:

Grant Thomas Jennings, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/17724 (2020.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17724 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0042 (2013.01);
Abstract

A system containing a host and a device having a field-programmable gate array ('FPGA') is disclosed. The system includes a set of configurable logic blocks ('LBs'), a bus, and a Universal Serial Bus ('USB') interface. The configurable LBs, in one aspect, are able to be selectively programmed to perform one or more logic functions. The bus contains a P-channel and an N-channel operable to transmit signals in accordance with a high-speed USB protocol. The USB interface is configured to include a first differential comparator operable to identify a logic zero state at the P-channel and a second differential comparator operable to identify a logic zero state at the N-channel.


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