The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2023
Filed:
Oct. 29, 2021
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Jin Ha Hwang, Icheon-si, KR;
Soon Sung An, Icheon-si, KR;
Junseo Jang, Icheon-si, KR;
Jaehyeong Hong, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/0185 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H03K 19/00361 (2013.01);
Abstract
A buffer circuit includes a power control circuit, an inverting circuit, and a voltage adjustment circuit. The power control circuit is configured to provide voltages based on an input signal and a mode signal, and the inverting circuit is configured to receive and invert the voltages to generate an output signal. The voltage adjustment circuit is configured to adjust voltage levels based on the mode signal and the output signal.