The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2023
Filed:
Dec. 14, 2021
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
Hasnain Akram, Austin, TX (US);
Graeme G. Mackay, Austin, TX (US);
Jason W. Lawrence, Austin, TX (US);
Assignee:
Cirrus Logic Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 1/00 (2006.01); H02M 1/32 (2007.01); G01R 19/165 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); G01R 19/16538 (2013.01); H02M 1/0009 (2021.05); H02M 1/0025 (2021.05); H02M 1/32 (2013.01);
Abstract
A system may include a boost converter configured to receive an input voltage and boost the input voltage to an output voltage and control circuitry configured to enforce a maximum current limit to limit a current drawn by the boost converter and in response to the output voltage decreasing below the input voltage, dynamically increase the current above the maximum current limit to cause the output voltage to be approximately equal to the input voltage.