The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Jul. 22, 2021
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Jae Young Lee, Gyeonggi-do, KR;

Yong Hwan Hong, Gyeonggi-do, KR;

Byung Ryul Kim, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 7/10 (2006.01); G11C 29/44 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 7/1057 (2013.01); G11C 7/1063 (2013.01); G11C 16/102 (2013.01); G11C 16/26 (2013.01); G11C 29/4401 (2013.01);
Abstract

A memory device includes a memory block including a plurality of pages, a peripheral circuit configured to perform a first program operation for storing first page data and a second program operation for storing second page data after the first program operation, a status register configured to store status information, a cache program operation controller configured to control the peripheral circuit to load the second page data from an external controller when the first program operation is being performed, and a status register controller configured to store in the status register first failure information indicating whether the first program operation passes, store in the status register validity information indicating whether the first failure information is valid information within a predetermined time period from when the second program operation starts, and provide the external controller with the status information including the first failure information and the validity information.


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