The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Apr. 13, 2022
Applicant:

Realtek Semiconductor Corp., HsinChu, TW;

Inventors:

Bing-Juo Chuang, HsinChu, TW;

Jing-Chu Chan, HsinChu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0042 (2013.01);
Abstract

The present invention provides a DP-out adapter including a decoder, a clock signal generating circuit, a DP signal generating circuit and a symbol counter value comparator. The decoder is configured to decode a USB signal to generate a plurality of packets. The clock signal generating circuit is configured to generate a clock signal. The DP signal generating circuit is configured to generate a DP signal according to the packets, and output the DP signal according to the clock signal. The symbol counter value comparator is configured to generate a first counter value according to a number of symbols corresponding to the plurality of packets, and use the clock signal to count to obtain a second counter value, and compare the first counter value and the second counter value to generate a control signal to the clock signal generating circuit to adjust a frequency of the clock signal.


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