The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2023

Filed:

Oct. 12, 2020
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Bryan D. Keen, San Francisco, CA (US);

Devon A. Monaco, San Jose, CA (US);

Sherry Lee, San Jose, CA (US);

Ihtesham H. Chowdhury, Sunnyvale, CA (US);

Eric N. Nyland, Santa Clara, CA (US);

Matthew D. Hill, Santa Clara, CA (US);

Arun R. Varma, San Jose, CA (US);

Lucy E. Browning, San Francisco, CA (US);

Sawyer I. Cohen, Menlo Park, CA (US);

Benjamin J. Pope, Mountain View, CA (US);

Abhishek Choudhury, San Jose, CA (US);

James W. Bilanski, Palo Alto, CA (US);

Yaodong Wang, San Jose, CA (US);

Daniel J. Morizio, Sunnyvale, CA (US);

Nicholas W. Ruhter, San Francisco, CA (US);

David A. Karol, Cupertino, CA (US);

Sean M. Gordoni, Santa Clara, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H04M 1/02 (2006.01); H05K 1/11 (2006.01); H05K 5/00 (2006.01); G06F 1/16 (2006.01); H05K 5/02 (2006.01);
U.S. Cl.
CPC ...
H04M 1/0206 (2013.01); G06F 1/1637 (2013.01); G06F 1/1686 (2013.01); H04M 1/026 (2013.01); H04M 1/0264 (2013.01); H04M 1/0266 (2013.01); H05K 1/115 (2013.01); H05K 1/118 (2013.01); H05K 1/189 (2013.01); H05K 5/0047 (2013.01); H05K 5/0086 (2013.01); H05K 5/0217 (2013.01); H04M 2201/38 (2013.01);
Abstract

A portable electronic device includes a housing defining an internal volume and a circuit board assembly within the internal volume. The circuit board assembly includes a first circuit board, a wall structure soldered to the first circuit board, and a second circuit board soldered to the wall structure and supported above the first circuit board by the wall structure. The second circuit board defines an exterior top surface of the circuit board assembly. A processor is coupled to the first circuit board and positioned within an internal volume defined between the first circuit board and the second circuit board and at least partially surrounded by the wall structure. A memory module is coupled to the exterior top surface of the circuit board assembly.


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