The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2023
Filed:
Jul. 16, 2021
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventor:
Youngwoo Park, Cheonan-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); G11C 11/56 (2006.01); G06K 19/077 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); G11C 11/5671 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); G06K 19/07732 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/1432 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/182 (2013.01);
Abstract
A memory card includes an upper case, a lower case, and an integrated circuit package between the upper case and the lower case. The integrated circuit package includes a memory stacked chip on a panel substrate, and the memory stacked chip includes a base memory stacked chip and an additional memory stacked chip stacked on the base memory stacked chip. The integrated circuit package includes a frequency boosting interface chip on the panel substrate and electrically connected to the memory stacked chip, and a controller chip on the panel substrate and electrically connected to the memory stacked chip and the frequency boosting interface chip.