The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2023

Filed:

Apr. 23, 2022
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Frederick K. H. Lee, Mountain View, CA (US);

Robert Proulx, Holden, MA (US);

Jie Wu, San Jose, CA (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); H03M 13/01 (2006.01); G11C 29/12 (2006.01); G11C 29/46 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/12005 (2013.01); G11C 29/46 (2013.01); H03M 13/015 (2013.01);
Abstract

A storage subsystem read voltage determination system coupled to a first storage subsystem may read data from the first storage subsystem at a plurality of different read voltage sets and, for each of the plurality of read voltage sets, generate a respective bit error probability distribution of a number of bit errors per codeword provided by the data read from the first storage subsystem. The storage subsystem read voltage provisioning system also generates an error correction capability graph associated with error correction code used by the first storage subsystem and, based on the bit error probability distributions and the error correction capability graph, generates a respective average codeword error rate for each of the plurality of read voltage sets. The storage subsystem read voltage provisioning system then identifies a first read voltage set for which a minimum average codeword error rate was determined.


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