The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2023

Filed:

Jul. 11, 2023
Applicant:

Eta Compute, Inc., Sunnyvale, CA (US);

Inventors:

Justin Ormont, Kirkland, WA (US);

Evan Petridis, Palo Alto, CA (US);

Luan Nguyen, San Jose, CA (US);

Jeremi Wojcicki, Milan, IT;

Assignee:

Eta Compute, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06N 20/00 (2019.01);
Abstract

Systems and methods for optimizing trained ML hardware models by collecting machine learning (ML) training inputs and outputs; selecting a ML model architecture from ML model architectures; training the selected ML model architecture with the ML training inputs and outputs; selecting a hardware processor from hardware processors; and creating a trained ML hardware model by inputting the selected hardware processor with the trained ML model. ML test inputs and outputs, and types of test metrics are selected and used to test the trained ML hardware model to provide runtime test metrics data for ML output predictions made by the trained ML hardware model. The trained ML hardware model is optimized to become an optimized trained ML hardware model using the runtime test metrics by selecting a new selected ML model architecture, selecting a new selected hardware processor, or updating the trained ML model using the runtime metrics test data.


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