The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2023
Filed:
Jan. 20, 2021
Dell Products, Lp, Round Rock, TX (US);
Hasnain Shabbir, Round Rock, TX (US);
Carlos Henry, Round Rock, TX (US);
Dell Products L.P., Round Rock, TX (US);
Abstract
An information handling system includes a management controller configured to determine whether to initiate control of power consumption of a memory subsystem of the information handling system. A closed-loop memory thermal controller may receive temperature values to determine a temperature setpoint for the memory subsystem, and calculate an error value that is a difference between the temperature setpoint and a temperature measurement. If the error value is within a temperature margin, then the thermal controller may determine a proportional-integral power signal based on the temperature margin and the temperature measurement; and determine a proportional-integral gain based on a maximum rate of change of the temperature measurement between polling events of the temperature measurement and a polling rate of the temperature measurement. The thermal controller may also determine a modified proportional-integral power signal based on the proportional-integral gain, wherein the modified proportional-integral power signal is used to determine a power adjustment value of the memory subsystem; and in response to an initiation from the management controller to control the power consumption of the memory subsystem, control the power consumption of the memory subsystem based on the power adjustment value.