The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2023
Filed:
Aug. 23, 2022
Applicant:
Psemi Corporation, San Diego, CA (US);
Inventors:
Ravindranath D. Shrivastava, San Diego, CA (US);
Payman Shanjani, San Diego, CA (US);
Assignee:
pSemi Corporation, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/46 (2006.01); H02M 3/07 (2006.01);
U.S. Cl.
CPC ...
G05F 1/46 (2013.01); H02M 3/07 (2013.01);
Abstract
Methods and devices to reduce or remove slumps in power supplies are disclosed. The disclosed teachings can serve various applications, such as applications implementing RF switches. Using such teachings, an integrated method can benefit from two different modes of operation where either an external or an internal charge pump can be used to provide a desired negative voltage to various components within the integrated circuit. This can be done by disposing a larger load capacitor outside the integrated circuit and without compromising any die space requirement.