The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Jun. 09, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Mihail Jefremow, Augsburg, DE;

David Zipperstein, Munich, DE;

Juergen Schaefer, Oberhaching, DE;

Holger Dienst, Feldkirchen, DE;

Markus Bichl, Feldkirchen-Westerham, DE;

Ralph Mueller-Eschenbach, Munich, DE;

Arndt Voigtlaender, Ottobrunn, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/56 (2006.01); H03M 3/00 (2006.01); G01S 7/03 (2006.01);
U.S. Cl.
CPC ...
H03K 17/56 (2013.01); H03M 3/458 (2013.01); H03M 3/50 (2013.01); G01S 7/03 (2013.01);
Abstract

According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.


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