The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Feb. 22, 2022
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo, JP;

Inventors:

Tomoyuki Ashimine, Nagaokakyo, JP;

Yuji Irie, Nagaokakyo, JP;

Yasuhiro Murase, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/92 (2006.01); H01L 21/265 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/94 (2006.01); H01L 23/31 (2006.01); H02M 7/5387 (2007.01);
U.S. Cl.
CPC ...
H01L 29/0607 (2013.01); H01L 29/66181 (2013.01); H01L 29/94 (2013.01); H01L 29/945 (2013.01); H01L 21/26533 (2013.01); H01L 23/3171 (2013.01); H02M 7/5387 (2013.01);
Abstract

A semiconductor device is provided that includes a semiconductor substrate having a first main surface and a second main surface facing each other; a dielectric layer laminated on the first main surface of the semiconductor substrate; a first electrode layer laminated on the dielectric layer; and a protective layer covering at least an outer peripheral end of the dielectric layer and an outer peripheral end of the first electrode layer. Moreover, the protective layer is provided to expose an outer peripheral end on the first main surface of the semiconductor substrate. The semiconductor substrate includes a high-resistance region positioned at least directly under an outer peripheral end of the protective layer.


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