The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Jun. 23, 2022
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventor:

Shinya Yamakawa, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 25/04 (2023.01); H01L 25/065 (2023.01); H01L 25/16 (2023.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14689 (2013.01); H01L 27/14605 (2013.01); H01L 27/14636 (2013.01); H01L 27/14643 (2013.01); H01L 27/14645 (2013.01); H01L 27/14647 (2013.01); H01L 27/14649 (2013.01); H01L 27/14652 (2013.01); H01L 27/14687 (2013.01); H01L 25/043 (2013.01); H01L 25/0657 (2013.01); H01L 25/167 (2013.01); H01L 25/50 (2013.01);
Abstract

Provided are a solid-state imaging device, a manufacturing method thereof, and an electronic device. The solid-state imaging device includes a first semiconductor layer in which a first photoelectric conversion unit and a first floating diffusion are formed, a second semiconductor layer in which a second photoelectric conversion unit and a second floating diffusion are formed, and a wiring layer including a wiring electrically connected to the first and second floating diffusions. The first semiconductor layer and the second semiconductor layer are laminated, and the wiring layer is formed on a side of the first or second semiconductor layer, the side being opposite to a side on which the first semiconductor layer and the second semiconductor layer face each other.


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