The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Jun. 27, 2022
Applicant:

Skyworks Solutions, Inc., Irvine, CA (US);

Inventors:

Jiro Yota, Westlake Village, CA (US);

Shiban Kishan Tiku, Camarillo, CA (US);

Assignee:

Skyworks Solutions, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 23/66 (2013.01); H01L 24/05 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/05557 (2013.01);
Abstract

A semiconductor die includes a substrate layer, one or more metal layers disposed over the substrate layer, and a pair of polyimide layers disposed over the substrate so that they define an interface therebetween. One or both of the pair of polyimide layers have a trench that separates the interface from the one or more metal layers. The trench can be formed by etching the polyimide layer(s). A topcoat insulation layer is disposed over the one or more metal layers and polyimide layers. The topcoat insulation layer is impervious to moisture and the trench inhibits migration of moisture along the interface to the one or more metal layers, thereby preventing metal migration from the one or more metal layers along the interface.


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