The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Apr. 25, 2022
Applicant:

Taiyo Yuden Co., Ltd., Tokyo, JP;

Inventors:

Hidetoshi Masuda, Takasaki, JP;

Minoru Ryu, Takasaki, JP;

Teruo Atsumi, Takasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/008 (2006.01); H01G 4/12 (2006.01); H01G 4/30 (2006.01);
U.S. Cl.
CPC ...
H01G 4/008 (2013.01); H01G 4/1227 (2013.01); H01G 4/30 (2013.01);
Abstract

A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Au. Each of the plurality of internal electrode layers includes an Au-containing layer of which an Au concentration with respect to all detected elements is 5 at % or more, on an interface between the each of the plurality of internal electrode layers and a dielectric layer next to the each of the plurality of internal electrode layers. A relationship of C≤500×t/T is satisfied when a thickness of the each of the plurality of internal electrode layers is T nm, a thickness of the Au-containing layer is t nm, and an Au concentration with respect to a total of Ni and Au in a whole of the each of the plurality of internal electrode layers is C at %.


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