The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Aug. 10, 2021
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Soo Hong Ahn, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 9/48 (2006.01); H04L 67/10 (2022.01); G06F 12/1072 (2016.01); H04L 67/60 (2022.01);
U.S. Cl.
CPC ...
G06F 9/5072 (2013.01); G06F 9/4843 (2013.01); G06F 9/5016 (2013.01); G06F 12/1072 (2013.01); H04L 67/10 (2013.01); H04L 67/60 (2022.05); G06F 2209/5011 (2013.01); G06F 2212/657 (2013.01);
Abstract

A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.


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