The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Jun. 29, 2022
Applicant:

National University of Defense Technology, Changsha, CN;

Inventors:

Bin Liang, Changsha, CN;

Xiaoyu Zhang, Changsha, CN;

Yaqing Chi, Changsha, CN;

Jianjun Chen, Changsha, CN;

Hengzhou Yuan, Changsha, CN;

Deng Luo, Changsha, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 15/18 (2006.01); G01R 31/28 (2006.01); G01R 1/22 (2006.01); H01F 38/30 (2006.01); H01F 38/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2851 (2013.01); G01R 1/22 (2013.01); G01R 15/181 (2013.01); G01R 15/183 (2013.01); H01F 38/28 (2013.01); H01F 38/30 (2013.01); H01F 2038/305 (2013.01);
Abstract

The present disclosure discloses a Single-Event Transient (SET) pulse measuring circuit capable of eliminating impact thereof, and an integrated circuit chip. The SET pulse measuring circuit capable of eliminating impact thereof includes four parts: a SET pulse test chain, a latch circuit, a flip-flop test circuit, a latching self-trigger circuit. The integrated circuit chip is provided with a test chain module and two sets of SET pulse measuring circuits capable of eliminating impact thereof, and inputs of the two sets of SET pulse measuring circuits capable of eliminating impact thereof are the same and each are connected to an output terminal of the test chain module.


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